Texas InstrumentsCDCLVP1102EVM
CDCLVP1102 Clock Buffer and Driver Evaluation Board
| RoHS Not Applicable | |
| EAR99 | |
| Active | |
| 8473.30.11.80 | |
| SVHC | Yes |
| SVHC überschreitet Schwellenwert | Yes |
| Automotive | No |
| PPAP | No |
Entwicklungskit-Beschreibung
The CDCLVP1102 is a high-performance, low additive phase noise clock buffer. It has a single universal input buffer that supports either single-ended or differential clock inputs, and feeds to two LVPECL outputs. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP1102. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP1102 device functionalities. For optimum performance, the board is equipped with 50-W SMA connectors and well-controlled, 50-W impedance microstrip transmission lines.
Entwicklungskit-Funktionen
-Easy-to-use evaluation board to fan out low phase noise clocks-Easy device setup-Fast configuration-Control pins configurable through jumpers-Board powered at +2.5-/+3.3-V-Single-ended or differential input clocks-CDCLVP1102 supports two LVPECL outputs; CDCLVP1102EVM supports one LVPECL outputDieses Entwicklungskit enthält
-SCAU035, CDCLVP1102EVM User's Guide-SCAS884, Two LVPECL Output, High-Performance Clock Buffer (Rev. C)Weitere Informationen zum Entwicklungskit
Technical Document
http://www.ti.com/lit/ds/symlink/cdclvp1102.pdf
| EDA / CAD Models |