Cypress SemiconductorCY7C341B-35JCCPLD
CPLD MAX® Family 3.75K Gates 192 Macro Cells 33.3MHz 0.65um, CMOS Technology 5V 84-Pin PLCC
| Not Compliant | |
| Obsolete | |
| 8542330001 | |
| Automotive | No |
| PPAP | No |
| MAX® | |
| EPROM | |
| 12 | |
| 192 | |
| 0.65um, CMOS | |
| 3750 | |
| No | |
| 64 | |
| 192 | |
| No | |
| 2 | |
| Yes | |
| No | |
| 40 | |
| 33.3 | |
| 20 | |
| 35 | |
| 35 | |
| No | |
| 4.75 | |
| 5.25 | |
| 5 | |
| 435(Typ) | |
| 0 | |
| 70 | |
| Commercial | |
| MAX | |
| Befestigung | Surface Mount |
| Verpackungshöhe | 3.68(Min) |
| Verpackungsbreite | 29.41(Max) |
| Verpackungslänge | 29.41(Max) |
| Leiterplatte geändert | 84 |
| Standard-Verpackungsname | LCC |
| Lieferantenverpackung | PLCC |
| 84 | |
| Leitungsform | J-Lead |
| EDA / CAD Models |