Cypress SemiconductorCY7C342B-20JCCPLD
CPLD MAX® Family 2.5K Gates 128 Macro Cells 66.7MHz 0.65um, CMOS Technology 5V 68-Pin PLCC
| Not Compliant | |
| Obsolete | |
| Automotive | No |
| PPAP | No |
| MAX® | |
| EPROM | |
| 8 | |
| 128 | |
| 0.65um, CMOS | |
| 32 | |
| 2500 | |
| No | |
| 52 | |
| 128 | |
| No | |
| 2 | |
| Yes | |
| No | |
| 71.4 | |
| 66.7 | |
| 9 | |
| 20 | |
| 20 | |
| No | |
| 4.75 | |
| 5.25 | |
| 5 | |
| 0 | |
| 70 | |
| Commercial | |
| MAX | |
| Befestigung | Surface Mount |
| Verpackungshöhe | 3.68(Min) |
| Verpackungsbreite | 24.33(Max) |
| Verpackungslänge | 24.33(Max) |
| Leiterplatte geändert | 68 |
| Standard-Verpackungsname | LCC |
| Lieferantenverpackung | PLCC |
| 68 | |
| Leitungsform | J-Lead |
| EDA / CAD Models |