Teledyne e2vCY7C343B-35JICPLD
CPLD MAX® Family 1.25K Gates 64 Macro Cells 33.3MHz 0.65um, CMOS Technology 5V 44-Pin PLCC
| Not Compliant | |
| EAR99 | |
| Obsolete | |
| 8542.39.00.01 | |
| MAX® | |
| EPROM | |
| 4 | |
| 64 | |
| 0.65um, CMOS | |
| 1250 | |
| No | |
| 28 | |
| 64 | |
| No | |
| 2 | |
| Yes | |
| No | |
| 40 | |
| 33.3 | |
| 20 | |
| 35 | |
| 35 | |
| No | |
| 4.5 | |
| 5.5 | |
| 5 | |
| 200(Typ) | |
| -40 | |
| 85 | |
| Industrial | |
| MAX |
| EDA / CAD Models |