Analog DevicesHSC-ADC-EVALDZDatenkonvertierung, Entwicklungsplatinen und -kits

The HSC-ADC-EVALDZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up and supports emerging serial interface standards, like JESD204B. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

• 256kB FIFO Depth
• JESD-204B support for up to eight (8) 6.5Gbps Lanes
• Parallel input at 644 MSPS SDR and 1.2 GSPS DDR
• Use with VisualAnalog® software
• Based on Virtex-6 FPGA
• Supports multiple ADC channels up to 18 bits
• Simple USB port interface (2.0)

Quick start guide link

Understanding High Speed ADC Testing and Evaluation - Application Note AN-835

VisualAnalog®

VisualAnalog® User's Manual - Application Note AN-905

High Speed ADC SPI Control Software User's Guide - Application Note AN-878

High Speed ADC SPI Control Software

Microsoft .NET Framework 3.5