Picking the right clock or oscillator for an upcoming design can be greatly simplified by following the guidelines presented in this paper from Silicon Labs.
Hardware design in high performance applications such as networking, data center, wireless infrastructure, broadcast video, test and measurement, and industrial automation is becoming increasingly complex as developers grapple with the need to support a growing number of standards, protocols, and specifications while incorporating higher speed serial data transmission. This challenge equally impacts timing component selection, since clock jitter can negatively impact the bit-error rate in high-speed serial data transmission applications and the signal-to-noise ratio and effective number of bits in data converter applications. Given the importance of timing, some hardware developers and architects are making clocking decisions at the beginning of the design process rather than waiting until later.
Silicon Labs offers a broad range of jitter attenuating clocks, clock generators, clock buffers, XOs, and VCXOs to meet customers’ unique timing requirements. Picking the right clock or oscillator for an upcoming design can be greatly simplified by following the guidelines presented in this paper.