SD Flash Controller Using SD Bus Reference Design based on the Open Cores SD Card Mass Storage Controller design
Referenzdesign unter Verwendung des Teils LFE5UM-85F-8MG756C von Lattice Semiconductor
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- Data Storage Devices
Beschreibung
- SD Flash Controller Using SD Bus Reference Design. This reference design provides a SD Flash Controller based on the Open Cores SD Card Mass Storage Controller design. The controller connects the SD card on one side and the WISHBONE bus on the other. All transmission and reception between the host and SD card comply with the SD Physical Layer Simplified Specification 2.0 released by the SD Card Association. This reference design is designed to work with a file system where a SD card can be recognized as a system disk
Haupteigenschaften
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Data Bus Width4 Bit
Empfohlene Bauteile (3)
| Teilenummer | Hersteller | Typ | Beschreibung | |||
|---|---|---|---|---|---|---|
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LCMXO3L-4300C-6BG256C | Lattice Semiconductor | Field Programmable Gate Arrays - FPGAs | FPGA MACHXO3 Family 4300 Cells 65nm Technology 1.2V 256-Pin CABGA Tray | In den Warenkorb | |
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LCMXO2-7000HC-6BG332C | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | FPGA MachXO2 Family 6864 Cells 65nm Technology 2.5V/3.3V 332-Pin CABGA Tray | In den Warenkorb | |
|
LFE3-95EA-7FN1156C | Lattice Semiconductor | Field Programmable Gate Arrays - FPGAs | FPGA LatticeECP3 Family 92000 Cells 65nm Technology 1.2V 1156-Pin FBGA Tray | In den Warenkorb | |