SDR SDRAM Controller - Advanced Reference Design
Referenzdesign unter Verwendung des Teils LFE5U-45F-6MG285C von Lattice Semiconductor
Für Endprodukte
- Data Storage Devices
Beschreibung
- SDR SDRAM Controller - Advanced Reference Design. Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed. This SDRAM controller reference design, located between the SDRAM and the bus master, reduces the user's effort to deal with the SDRAM command interface by providing a simple generic system interface to the bus master
Empfohlene Bauteile (5)
Teilenummer | Hersteller | Typ | Beschreibung | |||
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LCMXO2-1200HC-5TG144C | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | FPGA MachXO2 Family 1280 Cells 65nm Technology 2.5V/3.3V 144-Pin TQFP Tray | In den Warenkorb | |
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LFE3-95EA-7FN1156C | Lattice Semiconductor | Field Programmable Gate Arrays - FPGAs | FPGA LatticeECP3 Family 92000 Cells 65nm Technology 1.2V 1156-Pin FBGA Tray | In den Warenkorb | |
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ICE40LP8K-CM225 | Lattice Semiconductor | Field Programmable Gate Arrays - FPGAs | FPGA iCE40 LP Family 7680 Cells 40nm Technology 1.2V 225-Pin CSBGA Tray | In den Warenkorb | |
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LC4256ZE-5TN100C | Lattice Semiconductor | Complex Programmable Logic Devices - CPLDs | CPLD ispMACH® 4000ZE Family 256 Macro Cells 200MHz 1.8V 100-Pin TQFP Tray | In den Warenkorb | |
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LFE5U-45F-6MG285C | Lattice Semiconductor | Field Programmable Gate Arrays - FPGAs | FPGA LatticeECP5 Family 44000 Cells 40nm Technology 1.1V 285-Pin CSFBGA Tray | In den Warenkorb |